coreboot/src/mainboard/google/urara
Aaron Durbin bc8d47ebd4 UPSTREAM: Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS
Provide a default value of 0 in drivers/spi as there weren't
default values aside from specific mainboards and arch/x86.
Remove any default 0 values while noting to keep the option's
default to 0.

BUG=chrome-os-partner:56151
BRANCH=None
TEST=None

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16192
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: If9ef585e011a46b5cd152a03e41d545b36355a61
Reviewed-on: https://chromium-review.googlesource.com/373029
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-19 14:20:03 -07:00
..
board_info.txt google/intel mainboards: Add missing board_info.txt files 2016-03-25 20:52:04 +01:00
boardid.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
bootblock.c imgtec/pistachio: disable default RPU gate register values 2015-12-31 17:36:06 +01:00
chromeos.c UPSTREAM: google/urara: Provide dummy implementations of rec/dev functions 2016-07-28 22:56:40 -07:00
chromeos.fmd chromeos: import Chrome OS fmaps 2016-01-21 19:40:57 +01:00
devicetree.cb tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
Kconfig UPSTREAM: Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-19 14:20:03 -07:00
Kconfig.name
mainboard.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
Makefile.inc tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
memlayout.ld mainboard/google: Update license headers 2016-04-13 17:34:04 +02:00
urara_boardid.h mainboard/google: Update license headers 2016-04-13 17:34:04 +02:00