coreboot/src
Timothy Pearson 6fdb4d5d3c amd/amdfam10: Fix incorrect core count identification
The core count identification code in the PowerNow! _PSS
ACPI object generation code was incorrectly copied from the
model_fxx code.  This code has been rewritten to properly
return the number of cores installed in the system.

Change-Id: I19567486f2de9dc2c43970addf4d91fa3d233a99
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8421
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2015-02-11 23:10:10 +01:00
..
arch Get rid of .car.global_data warnings for GCC build 2015-02-09 17:44:02 +01:00
console CBMEM console: Fix and enhance pre-RAM support 2015-01-27 22:44:17 +01:00
cpu amd/amdfam10: Fix incorrect core count identification 2015-02-11 23:10:10 +01:00
device PCI subsystem: Remove AGP bridge type 2015-02-10 09:38:32 +01:00
drivers fsp_baytrail: Get FSP reserved memory from the FSP HOB list 2015-02-09 17:44:31 +01:00
ec vboot2: read dev and recovery switch 2015-01-27 01:43:31 +01:00
include PCI subsystem: Remove AGP bridge type 2015-02-10 09:38:32 +01:00
lib TPM: Fix whitespace 2015-02-06 00:25:59 +01:00
mainboard asus/m4a785/Kconfig: Add vgabios PCI id 2015-02-11 22:43:21 +01:00
northbridge intel/fsp_rangeley: Indent '#define' consistently 2015-02-06 00:58:50 +01:00
soc Baytrail_fsp: Make ME path configurable in menuconfig 2015-02-10 09:26:52 +01:00
southbridge Intel FSP platforms: Fix timestamps 2015-02-09 11:41:34 +01:00
superio superio/fintek: Add required changes so F81216H can be used 2015-02-04 15:45:39 +01:00
vendorcode intel/rangeley: Update UPD_DATA_REGION to support POST-GOLD 2 FSP 2015-01-31 23:09:26 +01:00
Kconfig CBMEM: Always use DYNAMIC_CBMEM 2015-01-27 22:54:32 +01:00