coreboot/src/soc
Kyösti Mälkki 6fcee7533c soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS
According to received feedback, FSP-T enables MMCONF at address
0xe0000000 with 256 busses. Sanity-check that Kconfig matches that.

Add MMCONF_BUS_NUMBER such that MCFG in ACPI will be correct.

Change-Id: I01309638a9f4ada71e5e3789db34892ed4abfa3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50665
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-08-19 18:14:59 +00:00
..
amd soc/amd/cezanne: Disable Co-op multitasking 2021-08-18 15:08:59 +00:00
cavium
example src: Introduce ARCH_ALL_STAGES_X86 2021-07-02 08:19:10 +00:00
intel soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS 2021-08-19 18:14:59 +00:00
mediatek device: Move MIPI panel library from mainboard/google/kukui into common 2021-08-18 14:21:28 +00:00
nvidia soc/nvidia/tegra124: Increase bootblock size 2021-07-26 05:05:41 +00:00
qualcomm sc7180: Add display support for mipi panels 2021-08-03 21:22:26 +00:00
rockchip soc/rockchip/rk3399/sdram: Add channel to error message 2021-03-04 01:22:10 +00:00
samsung commonlib/region: Turn addrspace_32bit into a more official API 2021-04-21 02:06:26 +00:00
sifive memlayout: Store region sizes as separate symbols 2021-02-19 08:39:26 +00:00
ti soc/ti/am335x/mmc.c: Fix memset length argument 2021-04-04 09:58:26 +00:00
ucb