coreboot/src/soc
Subrata Banik 6fb126773f soc/intel/ehl: Replace dt HeciEnabled by HECI1 disable config
The only option to make HECI1 function disable on Elkhart Lake SoC
platform is using SBI under SMM mode.

List of changes:
1. Drop `HeciEnabled` from dt and dt chip configuration.
2. Replace all logic that disables HECI1 based on the `HeciEnabled`
chip config with `DISABLE_HECI1_AT_PRE_BOOT` config.

Mainboards that choose to make HECI1 enable during boot don't override
`heci1 disable` config.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I76c625e6221fdef1343599e7dbc7739caa91bf98
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60727
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sheng Lean Tan <sheng.tan@9elements.com>
2022-01-21 16:02:34 +00:00
..
amd soc/amd/picasso/bootblock: drop unused includes 2022-01-20 22:29:01 +00:00
cavium Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
example Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
intel soc/intel/ehl: Replace dt HeciEnabled by HECI1 disable config 2022-01-21 16:02:34 +00:00
mediatek soc/mediatek: Fix include guard naming for emi.h 2022-01-13 15:26:54 +00:00
nvidia soc/nvidia,qualcomm: Fix indirect includes 2021-11-09 00:13:25 +00:00
qualcomm sc7180: Update video mode active horizontal/vertical/total calculations 2022-01-12 17:35:21 +00:00
rockchip mipi: Make panel init callback work directly on DSI transaction types 2021-09-11 01:42:47 +00:00
samsung src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
sifive src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
ti
ucb