Timothy Pearson 6f9468f019 amd/mct/ddr3: Rework memory speed to clock value conversion logic ... The existing DRAM clock speed to configuration value logic contained an error resulting in a theoretical out of bounds read. While this would not be hit on real hardware, it was prudent to clean up the logic to avoid the associated Coverity warning. Found-by: Coverity Scan #1347353 Change-Id: Ic3de3074f51d52be112a2d6f2d68e35dc881dd2e Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-on: https://review.coreboot.org/18073 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>		2017-01-11 00:18:34 +01:00
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amd	amd/mct/ddr3: Rework memory speed to clock value conversion logic	2017-01-11 00:18:34 +01:00
intel	nb/intel/945gc: Hardcode the integrated graphic frequencies	2017-01-10 19:53:24 +01:00
via	buildsystem: Drop explicit (k)config.h includes	2016-12-08 19:46:53 +01:00