EBG (Emmitsburg) PCH is used in Intel SPR-SP chipset. Its datasheet is Intel doc# 606161. Add Intel Emmitsburg PCH GPIO pin definitions. Also common code change is made to support Intel Emmitsburg PCH: a. Instead of 2 PAD registers per GPIO, it has 4 PAD registers. b. The register address space may not be contiguous from one GPIO group to the next GPIO group. Change-Id: Ia0d9179544020b6abb0be1ecd275a9a46356db8a Signed-off-by: Jonathan Zhang <jonzhang@meta.com> Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> |
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| .. | ||
| alderlake_h.h | ||
| alderlake_p.h | ||
| apollolake.h | ||
| cannonlake.h | ||
| cannonlake_lp.h | ||
| denverton.h | ||
| elkhartlake.h | ||
| emmitsburg.h | ||
| geminilake.h | ||
| gpio_groups.h | ||
| icelake.h | ||
| lewisburg.h | ||
| sunrise.h | ||
| tigerlake.h | ||