Jamie Ryu a02f00e5d6 soc/intel/tigerlake: Save DIMM info by available nodes ... TEST=Verified that dmidecode produces output identical to private repo Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Change-Id: I951ea94c280b7dd5b67f320a264d13fca82a4596 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39359 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-03-11 14:43:25 +00:00
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amd	soc/amd/picasso: Add PCI ID for Dali xHCI	2020-03-02 16:33:07 +00:00
cavium	soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>	2019-12-19 05:38:43 +00:00
intel	soc/intel/tigerlake: Save DIMM info by available nodes	2020-03-11 14:43:25 +00:00
mediatek	soc/mediatek/mt8183: Improve the DRAMC runtime config flow	2020-03-06 08:01:20 +00:00
nvidia	src: Remove unneeded 'include <arch/cache.h>'	2020-03-10 20:39:50 +00:00
qualcomm	src: Remove unneeded 'include <arch/cache.h>'	2020-03-10 20:39:50 +00:00
rockchip	src: Remove unneeded 'include <arch/cache.h>'	2020-03-10 20:39:50 +00:00
samsung	soc/{samsung,sifive}: Fix typos	2020-02-24 13:01:15 +00:00
sifive	soc/{samsung,sifive}: Fix typos	2020-02-24 13:01:15 +00:00
ucb	mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.	2019-12-06 15:09:48 +00:00