Paul Menzel d46161e9ea intel/microcode.h: Fix typo in comment: micr*o*code ... Introduced in commit »intel microcode: split up microcode loading stages« (98ffb426) [1]. [1] http://review.coreboot.org/2778 Change-Id: I626508b10f3998b43aaabd49853090b36f5d3eb0 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2992 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)		2013-04-03 19:19:09 +02:00
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hyperthreading.h	Intel CPUs: execute microcode update only once per core	2012-07-02 15:49:07 +02:00
l2_cache.h	cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.	2011-08-04 08:10:12 +02:00
microcode.h	intel/microcode.h: Fix typo in comment: micr*o*code	2013-04-03 19:19:09 +02:00
speedstep.h	Intel: Replace MSR 0xcd with MSR_FSB_FREQ	2013-02-11 20:51:33 +01:00
turbo.h	Add support for Intel Turbo Boost feature	2012-04-03 20:29:33 +02:00