coreboot/src
Rudolf Marek 6b89b4c75f Add support for RDC R8610 Southbridge
So far it just setups things right for Bifferboard. We may change it
in the future to fit other hardware.

Change-Id: I1c4ccff4e47b9cb9e31a738f038fc4f4ebe59087
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/808
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-03-27 18:39:05 +02:00
..
arch/x86 Makefile: rename linker intermediate variable 2012-03-25 20:23:21 +02:00
boot
console
cpu Fix possible deadlock on SMP stop_this_cpu 2012-03-25 20:35:26 +02:00
devices printf: Remove some L modifier uses 2012-03-24 15:32:24 +01:00
drivers
ec
include Add RDC R8610 PCI IDs. 2012-03-27 11:58:28 +02:00
lib Replace ramtest pattern to assist in DIMM configuration 2012-03-25 20:17:51 +02:00
mainboard Rename AMD_AGESA to CPU_AMD_AGESA 2012-03-16 22:40:35 +01:00
northbridge Add the support for RDC R8610 Northbridge 2012-03-27 18:37:57 +02:00
pc80
southbridge Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00
superio
vendorcode
Kconfig Disable the GDB stub by default 2012-03-26 16:06:21 +02:00
Kconfig.deprecated_options