1197476ca8
The memory reference code doesn't maintain some of
the registers which contain valuable information in order
to log correct reset and wake events in the eventlog. Therefore
snapshot the registers which matter in this area so that
they can be consumed by ramstage.
BUG=chrome-os-partner:24907
BRANCH=rambi,squawks
TEST=Did various resets/wakes with logging patch which
consumes this structure. Eventlog can pick up reset
events and power failures.
Change-Id: Id8d2d782dd4e1133113f5308c4ccfe79bc6d3e03
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181982
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
75 lines
2.4 KiB
C
75 lines
2.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied wacbmem_entryanty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <cbmem.h>
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#include <stdlib.h>
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static struct cbmem_id_to_name {
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u32 id;
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const char *name;
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} cbmem_ids[] = {
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{ CBMEM_ID_FREESPACE, "FREE SPACE " },
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{ CBMEM_ID_GDT, "GDT " },
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{ CBMEM_ID_ACPI, "ACPI " },
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{ CBMEM_ID_CBTABLE, "COREBOOT " },
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{ CBMEM_ID_PIRQ, "IRQ TABLE " },
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{ CBMEM_ID_MPTABLE, "SMP TABLE " },
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{ CBMEM_ID_RESUME, "ACPI RESUME" },
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{ CBMEM_ID_RESUME_SCRATCH, "ACPISCRATCH" },
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{ CBMEM_ID_ACPI_GNVS, "ACPI GNVS " },
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{ CBMEM_ID_ACPI_GNVS_PTR, "GNVS PTR " },
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{ CBMEM_ID_SMBIOS, "SMBIOS " },
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{ CBMEM_ID_TIMESTAMP, "TIME STAMP " },
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{ CBMEM_ID_MRCDATA, "MRC DATA " },
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{ CBMEM_ID_CONSOLE, "CONSOLE " },
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{ CBMEM_ID_ELOG, "ELOG " },
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{ CBMEM_ID_COVERAGE, "COVERAGE " },
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{ CBMEM_ID_ROMSTAGE_INFO, "ROMSTAGE " },
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{ CBMEM_ID_ROMSTAGE_RAM_STACK, "ROMSTG STCK" },
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{ CBMEM_ID_RAMSTAGE, "RAMSTAGE " },
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{ CBMEM_ID_RAMSTAGE_CACHE, "RAMSTAGE $ " },
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{ CBMEM_ID_ROOT, "CBMEM ROOT " },
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{ CBMEM_ID_VBOOT_HANDOFF, "VBOOT " },
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{ CBMEM_ID_CAR_GLOBALS, "CAR GLOBALS" },
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{ CBMEM_ID_REFCODE, "REFCODE " },
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{ CBMEM_ID_REFCODE_CACHE, "REFCODE $ " },
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{ CBMEM_ID_POWER_STATE, "POWER STATE" },
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};
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void cbmem_print_entry(int n, u32 id, u64 base, u64 size)
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{
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int i;
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const char *name;
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name = NULL;
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for (i = 0; i < ARRAY_SIZE(cbmem_ids); i++) {
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if (cbmem_ids[i].id == id) {
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name = cbmem_ids[i].name;
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break;
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}
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}
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if (name == NULL)
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printk(BIOS_DEBUG, "%08x ", id);
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else
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printk(BIOS_DEBUG, "%s", name);
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printk(BIOS_DEBUG, "%2d. ", n);
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printk(BIOS_DEBUG, "%08llx ", base);
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printk(BIOS_DEBUG, "%08llx\n", size);
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}
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