coreboot/src
Lee Leahy 69b34d1516 Broadwell FSP: Successful execution of TempRamExit
Add support to call FspTempRamExit

BRANCH=none
BUG=None
TEST=Use the following steps to reproduce:
1.  Get the private FSP parts
2.  Copy configs/config.samus.fsp to configs/config.samus
3.  Build and run on Samus
4.  After power on, POST code should be 0x35 if successful, hangs in
    src/soc/intel/broadwell/romstage/romstage.c/romstage_after_car

Change-Id: I512bfa8c3add8a16d945c5983873ee0286ec40d1
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/232500
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2014-12-11 09:40:27 +00:00
..
arch vboot: make vboot2_verify_firmware return 2014-12-11 01:55:26 +00:00
console Avoid 64bit math on MIPS platforms 2014-12-02 01:57:08 +00:00
cpu cbmem: Unify random on-CBMEM-init tasks under common CBMEM_INIT_HOOK() API 2014-12-04 04:01:59 +00:00
device Broadwell FSP: Add new finalize functions for devices and chips 2014-11-20 20:49:36 +00:00
drivers spi_flash: add support for S25FL116K 2014-12-11 04:23:33 +00:00
ec chromeec: Add wakeup delay after SPI /CS assertion 2014-10-01 06:53:27 +00:00
include timestamps: You can never have enough of them! 2014-12-10 02:00:24 +00:00
lib timestamp: disambiguate error messages 2014-12-11 04:23:27 +00:00
mainboard Broadwell FSP: Successful execution of MemoryInit 2014-12-11 05:43:47 +00:00
northbridge cbmem: Unify random on-CBMEM-init tasks under common CBMEM_INIT_HOOK() API 2014-12-04 04:01:59 +00:00
soc Broadwell FSP: Successful execution of TempRamExit 2014-12-11 09:40:27 +00:00
southbridge timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
superio superio: ite8772f: Exit extemp busy state 2014-09-27 07:09:25 +00:00
vendorcode vboot: make vboot2_verify_firmware return 2014-12-11 01:55:26 +00:00
Kconfig rk3288: Disable ramstage compression by default 2014-12-10 01:59:47 +00:00