coreboot/src
Lee Leahy 2befcbb85d UEFI: Conditionally define the ASSERT macro
Only define the ASSERT macro when it is not already defined.  This
change allows the UEFI/FSP definitions to be included with most other
coreboot includes.

BRANCH=none
BUG=None
TEST=Build and run on sklrvp

Change-Id: Iccfeb83eb1e52623ae0a0fe2a96b587ce61f82d7
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10334
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-05-29 22:20:16 +02:00
..
arch Add TCPA table. 2015-05-28 08:10:32 +02:00
console consoles: remove unused infrastructure 2015-05-26 19:02:54 +02:00
cpu binaryPI: Hide use of acpi_slp_type 2015-05-29 17:04:52 +02:00
device
drivers tpm: Add Infineon TPM 1.2 support 2015-05-29 19:19:32 +02:00
ec lenovo: Move pc_keyboard_init to h8 init. 2015-05-29 07:45:55 +02:00
include Remove leftover smi_get_tseg_base 2015-05-29 07:06:37 +02:00
lib Remove leftover smi_get_tseg_base 2015-05-29 07:06:37 +02:00
mainboard binaryPI: Hide use of acpi_slp_type 2015-05-29 17:04:52 +02:00
northbridge intel/nehalem/raminit.c: Remove space in timestamp_add_now(104) 2015-05-29 08:52:43 +02:00
soc intel/broadwell: Hide use of acpi_slp_type 2015-05-29 17:05:08 +02:00
southbridge bd82x6x: Move calling of finalize() on resume to southbridge code 2015-05-29 11:26:06 +02:00
superio
vendorcode UEFI: Conditionally define the ASSERT macro 2015-05-29 22:20:16 +02:00
Kconfig fmap: new API using region_device 2015-05-26 22:33:53 +02:00