1c37157218
This patch removes the recently added update8/16/32/64() API and replaces it with clrsetbits8/16/32/64(). This is more in line with the existing endian-specific clrsetbits_le16/32/64() functions that have been used for this task on some platforms already. Rename clrsetbits_8() to clrsetbits8() to be in line with the new naming. Keep this stuff in <device/mmio.h> and get rid of <mmio.h> again because having both is confusing and we seem to have been standardizing on <device/mmio.h> as the standard arch-independent header that all platforms should include already. Also sync libpayload back up with what we have in coreboot. (I'm the original author of the clrsetbits_le32-definitions so I'm relicensing them to BSD here.) Change-Id: Ie4f7b9fdbdf9e8c0174427b4288f79006d56978b Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37432 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| .. | ||
| arm/arch | ||
| arm64/arch | ||
| arpa | ||
| pci | ||
| storage | ||
| sys | ||
| udc | ||
| usb | ||
| x86/arch | ||
| archive.h | ||
| assert.h | ||
| cbfs.h | ||
| cbfs_core.h | ||
| cbfs_ram.h | ||
| cbgfx.h | ||
| compiler.h | ||
| coreboot_tables.h | ||
| ctype.h | ||
| die.h | ||
| endian.h | ||
| errno.h | ||
| exception.h | ||
| fmap_serialized.h | ||
| gdb.h | ||
| getopt.h | ||
| inttypes.h | ||
| ipchksum.h | ||
| kconfig.h | ||
| keycodes.h | ||
| libpayload.h | ||
| limits.h | ||
| lz4.h | ||
| lzma.h | ||
| malloc.h | ||
| multiboot_tables.h | ||
| panel.h | ||
| pci.h | ||
| queue.h | ||
| stdarg.h | ||
| stddef.h | ||
| stdint.h | ||
| stdio.h | ||
| stdlib.h | ||
| string.h | ||
| strings.h | ||
| swab.h | ||
| sysinfo.h | ||
| term.h | ||
| time.h | ||
| unistd.h | ||
| video_console.h | ||