coreboot/src/soc
Felix Held f167df4d3f soc/amd/picasso/acpi/sb_pci0_fch: replace Memory32Fixed with DWordMemory
This brings the ACPI code more in line with both what the new code for
the AMD SoCs will do and also what the current Intel code does. This was
mainly done to have a reduced delta to the new AMD domain resource
handling functions to debug it, but it might still be useful to upstream
this change.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8cca05976b1c9d4e994e407b8c0197da7dd35eb2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75487
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-05-31 13:46:26 +00:00
..
amd soc/amd/picasso/acpi/sb_pci0_fch: replace Memory32Fixed with DWordMemory 2023-05-31 13:46:26 +00:00
cavium soc/cavium/cn81xx: Use correct size for MPIDR_EL1 register 2023-05-13 17:22:16 +00:00
example/min86
intel soc/intel/xeon_sp: Enable build for IO Margining 2023-05-28 20:11:25 +00:00
mediatek treewide: Remove 'extern' from functions declaration 2023-05-26 13:45:24 +00:00
nvidia
qualcomm treewide: Remove 'extern' from functions declaration 2023-05-26 13:45:24 +00:00
rockchip
samsung
sifive/fu540
ti
ucb/riscv