Jon Harrison 1825be291f Get the Via EPIA-N(L)/CN400 to a reasonable level of maturity:: ... Tested on Via EPIA-NL8000EG with FILO payload booting FC9 (2.6.25 kernel) from SATA HDD. ACPI is working for PCI interrupt routing, some memory stuff and Soft-Off. USB/SATA Working VGA Console Working X Working via Onboard AGP Removed dsdt.c, fixed some whitespace. Signed-off-by: Jon Harrison <bothlyn@blueyonder.co.uk> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2009-08-17 17:09:46 +00:00
..
agp.h	eric patch	2005-07-08 02:49:49 +00:00
cardbus.h	EPIA-M fixup	2005-11-22 00:07:02 +00:00
device.h	Move the v3 resource allocator to v2.	2009-07-02 18:56:24 +00:00
hypertransport.h	1203_hcdn.diff:	2005-12-04 21:52:58 +00:00
hypertransport_def.h	AMD Rev F support	2006-10-04 20:46:15 +00:00
path.h	coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3	2009-02-28 20:10:20 +00:00
pci.h	Rewrite interrupt handling in coreboot to be more comprehensible and	2009-07-21 21:36:41 +00:00
pci_def.h	add define for Role-Based Error Reporting to PCIe defines (trivial)	2009-04-21 23:01:10 +00:00
pci_ids.h	Get the Via EPIA-N(L)/CN400 to a reasonable level of maturity::	2009-08-17 17:09:46 +00:00
pci_ops.h	This patch unifies the use of config options in v2 to all start with CONFIG_	2009-06-30 15:17:49 +00:00
pci_rom.h	Fix a redundant declaration warning (trivial)	2009-07-22 01:42:13 +00:00
pciexp.h	eric patch	2005-07-08 02:49:49 +00:00
pcix.h	eric patch	2005-07-08 02:49:49 +00:00
pnp.h	This, ladies and gentlement, is commit #4000.	2009-03-13 15:42:27 +00:00
pnp_def.h	- First pass through with with device tree enhancement merge. Most of the mechanisms should	2004-10-14 20:54:17 +00:00
resource.h	Move the v3 resource allocator to v2.	2009-07-02 18:56:24 +00:00
smbus.h	i2c mux support	2004-12-03 03:39:04 +00:00
smbus_def.h	- Update the device header files	2004-10-14 21:10:23 +00:00