Naresh G Solanki 663f04eaad UPSTREAM: lib: Add library to handle SPD data in CBFS or DIMM ... Add library to: 1. add spd.bin in cbfs, generated from mainboard/spd/*.spd.hex files. 2. runtime get spd data with spd index as input. 3. fetch spd over smbus using early smbus functions. BUG=None BRANCH=None TEST=None Change-Id: I44fe1cdb883dd1037484d4bb5c87d2d4f9862bf8 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/17434 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-on: https://chromium-review.googlesource.com/415643 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org>		2016-12-01 03:34:21 -08:00
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gnat	UPSTREAM: Add option to use Ada code in ramstage	2016-11-07 11:02:52 -08:00
b64_decode.c
boot_device.c	UPSTREAM: lib/boot_device: add RW boot device construct	2016-08-19 14:20:23 -07:00
bootblock.c
bootmem.c
bootmode.c	UPSTREAM: bootmode: Get rid of CONFIG_BOOTMODE_STRAPS	2016-07-28 22:56:28 -07:00
cbfs.c	UPSTREAM: ACPI S3: Remove HIGH_MEMORY_SAVE where possible	2016-11-10 18:31:17 -08:00
cbmem_common.c
cbmem_console.c	UPSTREAM: arch/x86,lib: make cbmem console work in postcar stage	2016-09-21 19:36:55 -07:00
cbmem_stage_cache.c
compute_ip_checksum.c
coreboot_table.c	UPSTREAM: drivers/spi: ensure SPI flash is boot device for coreboot tables	2016-08-21 12:04:51 -07:00
debug.c
delay.c
edid.c	UPSTREAM: edid: Fix a function signature	2016-09-09 12:33:33 -07:00
ext_stage_cache.c	UPSTREAM: soc/intel/apollolake: Implement stage cache to improve resume time	2016-10-11 14:31:54 -07:00
fallback_boot.c
fmap.c	UPSTREAM: lib/fmap: provide RW region device support	2016-08-22 00:11:45 -07:00
gcc.c
gcov-glue.c
gcov-io.c
gcov-io.h
gcov-iov.h
generic_dump_spd.c
generic_sdram.c
gpio.c
halt.c
hardwaremain.c	UPSTREAM: Add option to use Ada code in ramstage	2016-11-07 11:02:52 -08:00
hexdump.c
hexstrtobin.c
imd.c
imd_cbmem.c	UPSTREAM: arch/x86,lib: make cbmem console work in postcar stage	2016-09-21 19:36:55 -07:00
jpeg.c
jpeg.h
libgcc.c
libgcov.c
lzma.c
lzmadecode.c
lzmadecode.h
Makefile.inc	UPSTREAM: lib: Add library to handle SPD data in CBFS or DIMM	2016-12-01 03:34:21 -08:00
malloc.c
memchr.c
memcmp.c
memcpy.c
memmove.c
memrange.c
memset.c
mocked_tlcl.c
nhlt.c
primitive_memtest.c
prog_loaders.c	UPSTREAM: ACPI S3: Remove HIGH_MEMORY_SAVE where possible	2016-11-10 18:31:17 -08:00
prog_ops.c
program.ld	UPSTREAM: lib/program.ld: add .sdata sections	2016-11-03 14:44:10 -07:00
ramtest.c	UPSTREAM: quick_ram_check: Remove reference to RAMBASE	2016-11-08 23:24:09 -08:00
reg_script.c
rmodule.c
rmodule.ld
romstage_stack.c	UPSTREAM: intel post-car: Increase stacktop alignment	2016-11-21 11:53:20 -08:00
rtc.c
selfboot.c	arm64: Use 'payload' format for ATF instead of 'stage'	2016-09-08 06:15:36 -07:00
spd_bin.c	UPSTREAM: lib: Add library to handle SPD data in CBFS or DIMM	2016-12-01 03:34:21 -08:00
stack.c
thread.c	UPSTREAM: src/lib: Capitalize ROM, RAM, NVRAM and CPU	2016-08-04 23:38:04 -07:00
timer.c
timer_queue.c
timestamp.c	UPSTREAM: memlayout: Ensure TIMESTAMP() region is big enough to avoid BUG()	2016-08-24 17:40:09 -07:00
tlcl.c	UPSTREAM: lib/tlcl: Ensure tlcl library is initialized only once	2016-11-14 19:58:54 -08:00
tlcl_internal.h
tlcl_structures.h
tpm2_marshaling.c	UPSTREAM: tpm2: Fix tlcl and marshaling code for CAR usage	2016-09-07 21:31:36 -07:00
tpm2_marshaling.h
tpm2_tlcl.c	UPSTREAM: vboot: TPM2 - report attempts to re-create NVRAM spaces	2016-11-16 07:08:26 -08:00
tpm2_tlcl_structures.h	tpm2: implement and use pcr_extend command	2016-07-07 22:14:28 -07:00
tpm_error_messages.h	UPSTREAM: src/lib: Fix checkpatch warnings	2016-09-08 17:57:25 -07:00
trace.c	UPSTREAM: src/lib: Fix checkpatch warnings	2016-09-08 17:57:25 -07:00
version.c	UPSTREAM: lib/version: Correct whitespace alignment	2016-07-15 08:39:33 -07:00
wrdd.c