coreboot/src/soc/amd
Felix Held 65783fbeb4 soc/amd/cezanne: use common TSC and monotonic timer code
Change-Id: I9bc82f1e64f2cf21bfa4bf1ac75d17247208686c
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48306
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-06 18:59:53 +00:00
..
cezanne soc/amd/cezanne: use common TSC and monotonic timer code 2020-12-06 18:59:53 +00:00
common soc/amd: factor out common family 17h&19h TSC and monotonic timer code 2020-12-06 18:59:27 +00:00
picasso soc/amd: factor out common family 17h&19h TSC and monotonic timer code 2020-12-06 18:59:27 +00:00
stoneyridge soc/amd/stoneyridge: order selected Kconfig options alphabetically 2020-12-05 18:15:53 +00:00
Kconfig soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig 2020-11-19 14:29:14 +00:00