Richard Spiegel 65562cd654 soc/amd/picasso: Use new common SPI code ... Use the new SPI code from common folder, delete spi.c. SPI related macros must be single defined, in southbridge.h if they are used by files other than the common SPI code, fch_spi.h if they are only used by the common SPI code. The only exception is SPI_FIFO_DEPTH which must be in southbridge.h, because it can change between SOC. BUG=b:136595978 TEST=None, code already tested with grunt. Change-Id: I68008ce076d348adbdabf7b49cec8783dd7134b4 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35020 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>		2019-09-21 20:35:03 +00:00
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amd	soc/amd/picasso: Use new common SPI code	2019-09-21 20:35:03 +00:00
cavium	arm64: Uprev Arm TF and adjust to BL31 parameter changes	2019-09-14 05:01:16 +00:00
imgtec	cpu,mb,soc: Init missing lb_serial struct fields	2019-09-19 09:28:10 +00:00
intel	soc/intel/common/intelblocks: Remove PAD_CFG_GPI_GPIO_DRIVER_SCI	2019-09-20 07:17:01 +00:00
mediatek	mediatek/mt8183: Support more DRAM frequency bootup	2019-09-20 07:24:04 +00:00
nvidia	cpu,mb,soc: Init missing lb_serial struct fields	2019-09-19 09:28:10 +00:00
qualcomm	soc/qualcomm/ipq40xx: Remove unnecessary allocation	2019-09-20 07:18:43 +00:00
rockchip	arm64: Uprev Arm TF and adjust to BL31 parameter changes	2019-09-14 05:01:16 +00:00
samsung	cpu,mb,soc: Init missing lb_serial struct fields	2019-09-19 09:28:10 +00:00
sifive	soc/sifive/fu540: add code for spi and map flash to memory spaces	2019-08-12 08:35:17 +00:00
ucb	lib: Rewrite qemu-armv7 ramdetect	2019-07-28 11:31:42 +00:00