Rizwan Qureshi 6467014046 soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0 ... In FSP 2.0 the UPD to send extra VR Mailbox commands is switched from SendVrMbxCmd to SendVrMbxCmd1. Use the same in silicon initialization. Change-Id: I46bd50c9acc0456e2483f20ccb5e9ec2a0de232a Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/17578 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-11-30 16:58:52 +01:00
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acpi	src/acpi: Capitalize ACPI and SATA	2016-07-31 19:25:40 +02:00
arch	Build system: Update HAVE_CMOS_DEFAULT	2016-11-28 18:58:15 +01:00
commonlib	soc/intel/common: Add save/restore for variable MRC data	2016-11-30 16:46:16 +01:00
console	Hook up libhwbase in ramstage	2016-11-29 23:45:40 +01:00
cpu	AGESA binaryPI: Fix cache-as-ram for x86_64	2016-11-25 10:32:07 +01:00
device	drivers/intel/gma: Hook up libgfxinit	2016-11-29 23:46:05 +01:00
drivers	driver/intel/fsp2_0: Add version parameter to FSP platform callback	2016-11-30 16:45:29 +01:00
ec	google/parrot: Fix keyboard interrupts, DSDT	2016-11-25 20:50:00 +01:00
include	soc/intel/common: Add save/restore for variable MRC data	2016-11-30 16:46:16 +01:00
lib	Hook up libhwbase in ramstage	2016-11-29 23:45:40 +01:00
mainboard	mainboard/google/snappy: Tune i2c frequency to 400 Khz	2016-11-30 16:53:02 +01:00
northbridge	intel/fsp_rangeley: Fix regression on MMCONF_SUPPORT	2016-11-30 14:40:38 +01:00
soc	soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0	2016-11-30 16:58:52 +01:00
southbridge	sb/intel/i3100/lpc.c: Use tab for indents	2016-11-28 01:06:33 +01:00
superio	sio/nuvoton: Include generic nuvoton driver in bootblock stage	2016-11-28 20:33:21 +01:00
vboot	commonlib/include: remove NEED_VB20_INTERNALS	2016-11-19 16:57:27 +01:00
vendorcode	vendorcode/intel: Update apollolake UPD headers to SIC 1.2.3 release	2016-11-30 16:44:53 +01:00
Kconfig	Hook up libhwbase in ramstage	2016-11-29 23:45:40 +01:00