Marc Jones 645bca4810 soc/intel/xeon_sp/skx: Reorder soc_util.c ... Reorder soc_util.c and remove the un-needed #if ENV_RAMSTAGE to match cpx version in preparation for more de-duplication. Change-Id: Iab343e903e2478709fe91739c9ca77f587286df7 Signed-off-by: Marc Jones <marcjones@sysproconsulting.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47171 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2020-11-09 03:00:45 +00:00
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acpi	soc/intel/skl,acpi/acpigen: convert global CPPC package to local one	2020-11-04 09:40:21 +00:00
arch	arch/x86/smbios: Populate SMBIOS type 7 with cache information	2020-10-26 06:54:04 +00:00
commonlib	lib/libpayload: Replace strapping_ids with new board configuration entry	2020-10-30 15:25:28 +00:00
console	console/init: Drop CONSOLE_LEVEL_CONST	2020-10-26 06:48:45 +00:00
cpu	cpu/intel/haswell: Move smmrelocate.c MSR definitions to header	2020-11-03 19:12:01 +00:00
device	azalia: Treat all negative return values as errors	2020-11-02 10:41:15 +00:00
drivers	soc/intel/common: Create common Intel FSP reset code block	2020-11-02 10:43:40 +00:00
ec	ec/google/chromeec: Remove the check for Internal TypeC MUX	2020-11-05 19:06:31 +00:00
include	acpi/acpi.h: Update region spaces	2020-11-04 09:40:40 +00:00
lib	lib/libpayload: Replace strapping_ids with new board configuration entry	2020-10-30 15:25:28 +00:00
mainboard	mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'	2020-11-08 17:16:23 +00:00
northbridge	haswell: Add Intel TXT support in romstage	2020-11-04 23:53:51 +00:00
security	security/vboot: Add Kconfig symbol to set hashing block size	2020-11-06 17:46:13 +00:00
soc	soc/intel/xeon_sp/skx: Reorder soc_util.c	2020-11-09 03:00:45 +00:00
southbridge	sb/intel/lynxpoint/pcie.c: Ensure OBFF is disabled	2020-11-07 14:20:38 +00:00
superio	superio/nuvoton: Factor out equivalent Kconfig option	2020-10-19 07:06:20 +00:00
vendorcode	vc/intel/FSP2_0/CPX-SP: update to ww45 release and add watermark option	2020-11-07 00:12:35 +00:00
Kconfig	soc/intel/xeon_sp: Move function debug macros	2020-10-29 16:44:19 +00:00