coreboot/src
Sumeet R Pawnikar 633e0f2264 soc/intel/alderlake: remove duplicate PL2 override
PL2 override value is already declared under common code in power_limit.h file.
Removing this duplicate PL2 override from soc specific header file.

BRANCH=None
BUG=None
TEST=Built and tested on brya

Change-Id: I1424f36fbe038d478f4b8f6257d78d4a3ede3258
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-05-04 15:03:44 +00:00
..
acpi ACPI: Use acpigen for NVS OperationRegions 2021-04-30 06:49:04 +00:00
arch arch/x86: Fix building with CONFIG_VBOOT_SEPARATE_VERSTAGE=n 2021-05-04 14:03:12 +00:00
commonlib
console src: Replace remaining {get,set}_option() instances 2021-04-23 10:13:39 +00:00
cpu cpu/x86/mtrr: Use a Kconfig for reserving MTRRs for OS 2021-04-29 14:51:47 +00:00
device device: Switch pci_dev_is_wake_source to take pci_devfn_t 2021-05-03 16:28:42 +00:00
drivers drivers/intel/fsp1_1: Remove verstage compilation units 2021-05-04 14:04:06 +00:00
ec ec/lenovo/h8/h8.c: Skip setting volume if out of range 2021-04-29 05:26:11 +00:00
include device: Switch pci_dev_is_wake_source to take pci_devfn_t 2021-05-03 16:28:42 +00:00
lib lib/espi_debug: Add espi_show_slave_peripheral_channel_configuration 2021-04-23 21:20:26 +00:00
mainboard mb/google/zork/vilboz: Disable HDMI 2.0 for Vilboz 2021-05-04 08:38:11 +00:00
northbridge nb/intel/common: Replace _bar_clrsetbits_impl macro 2021-05-03 07:38:52 +00:00
security
soc soc/intel/alderlake: remove duplicate PL2 override 2021-05-04 15:03:44 +00:00
southbridge sb/intel/common: Refactor _PRT generation to support GSI-based tables 2021-04-27 11:06:38 +00:00
superio superio/nuvoton/npcd378: Fall back to non-negative value 2021-04-28 16:12:11 +00:00
vendorcode vendorcode: add code for cezanne psp_verstage 2021-05-02 18:22:41 +00:00
Kconfig