Nico Huber 62ddc491cf soc/intel/common/uart: Correctly guard uart_platform_base() ... We should only provide this implementation when the Intel LPSS UART is used. Otherwise, no other UART could be used for the console with these SoCs. Change-Id: Iebd89edb3f21d4a68587fd02659b4d529f3f4bbe Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33097 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao <lance.zhao@gmail.com>		2019-06-03 13:24:27 +00:00
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apollolake	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
baytrail	soc/intel/baytrail: set default VBIOS filename and PCI ID	2019-06-02 22:26:34 +00:00
braswell	soc/intel/braswell/acpi/globalnvs.asl: Remove redundant use of Offset	2019-05-29 20:14:27 +00:00
broadwell	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
cannonlake	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
common	soc/intel/common/uart: Correctly guard uart_platform_base()	2019-06-03 13:24:27 +00:00
denverton_ns	soc/intel/denverton_ns: Don't use CONFIG_CBFS_SIZE	2019-05-29 20:24:13 +00:00
fsp_baytrail	soc/intel/fsp_baytrail/romstage: Remove variable set but not used	2019-05-23 08:58:33 +00:00
fsp_broadwell_de	soc/intel/fsp_broadwell_de/romstage: Remove variable set but not used	2019-05-23 08:58:15 +00:00
icelake	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
quark	soc/intel/quark: Don't use CAR_GLOBAL	2019-05-29 20:05:06 +00:00
skylake	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
Kconfig	src/cpu: Remove dead sourced lines	2018-11-15 10:25:20 +00:00