Fengquan Chen 62aa2bb784 soc/mediatek: preserve WDT reset reason for debugging ... 1. Disable external output reset signal in first WDT reset to preserve WDT original reset reason for WDT issue in kernel stage. 2. After preserved WDT reset reason, do fully reset again by sending external output reset signal. BUG=b:194025005 TEST=boot to kernel ok and function test pass Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.corp-partner.google.com> Change-Id: I5887a8312f4daab3cbd0a30fea0195670a932e52 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>		2021-09-08 08:25:19 +00:00
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common	soc/mediatek: preserve WDT reset reason for debugging	2021-09-08 08:25:19 +00:00
mt8173	soc/mediatek: Move the power domain data under each SoC	2021-05-05 07:37:21 +00:00
mt8183	soc/mediatek: Move the SSPM driver to common	2021-06-01 08:28:30 +00:00
mt8192	soc/mediatek/mt8192: move DFD driver to common folder	2021-08-12 17:59:00 +00:00
mt8195	soc/mediatek/mt8195: Update clock square setting	2021-08-23 06:04:02 +00:00
Kconfig