erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
coreboot/src
History
Kyösti Mälkki 6271dd8459 soc/intel/baytrail,broadwell: Use resume_from_stage_cache() 
Change-Id: Ie7b8bd02c3bb92c6ab9071941abbd90afef82601
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50001
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-29 10:54:13 +00:00
..
acpi ACPI: Do minor improvements on GNVS 2021-01-29 10:21:25 +00:00
arch stage_cache: Add resume_from_stage_cache() 2021-01-29 10:53:33 +00:00
commonlib
console
cpu cpu/intel/socket_LGA775: Align CAR DCACHE_RAM_BASE to SIZE 2021-01-28 12:34:52 +00:00
device src/device: Don't die() on vBIOS errors 2021-01-27 10:24:44 +00:00
drivers stage_cache: Add resume_from_stage_cache() 2021-01-29 10:53:33 +00:00
ec ec/google/wilco: Convert to ASL 2.0 syntax 2021-01-24 21:51:39 +00:00
include stage_cache: Add resume_from_stage_cache() 2021-01-29 10:53:33 +00:00
lib stage_cache: Add resume_from_stage_cache() 2021-01-29 10:53:33 +00:00
mainboard mb/emulation/qemu-q35: Rename PICF to PICM in ASL 2021-01-29 10:21:54 +00:00
northbridge nb/intel/haswell/haswell.h: Do not include pch.h 2021-01-27 21:28:18 +00:00
security security/tpm/tss/tcg-1.2/tss.c: Use __func__ 2021-01-19 08:58:50 +00:00
soc soc/intel/baytrail,broadwell: Use resume_from_stage_cache() 2021-01-29 10:54:13 +00:00
southbridge southbridge/intel: Define default value for ME_REGION_ALLOW_CPU_READ_ACCESS 2021-01-28 09:31:39 +00:00
superio superio/nuvoton/common/Kconfig: Remove HWM config 2021-01-29 09:39:43 +00:00
vendorcode vc/google/chromeos/Kconfig: Remove unused NO_TPM_RESUME 2021-01-29 09:40:19 +00:00
Kconfig