coreboot/src/soc
Michael Niewöhner 60795784b7 soc/intel/cannonlake: fix GPIO community numbering in ACPI
This corrects the GPIO community numbers in CNL-LP ACPI code.

Change-Id: I9f13a28d3e8f427859570a4d209304ae8444efd9
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45209
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-17 10:36:31 +00:00
..
amd soc/amd/picasso: add dptc support 2020-09-17 06:05:27 +00:00
cavium include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
intel soc/intel/cannonlake: fix GPIO community numbering in ACPI 2020-09-17 10:36:31 +00:00
mediatek soc/mediatek/mt8192: Init PLL in bootblock 2020-09-17 06:56:55 +00:00
nvidia include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
qualcomm sc7180: report hardware watchdog reset after reboot 2020-09-16 00:44:09 +00:00
rockchip include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
samsung include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
sifive include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
ti include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00