History

Patrick Georgi 6065f616eb .gitignore: Split into subdirectory files There's no need for the global list of files to ignore, so use git's ability to work with more local configuration. Change-Id: I50882e6756cbc0fdfd899353cc23962544690fb3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46879 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-10-30 07:05:27 +00:00
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.gitignore	.gitignore: Split into subdirectory files	2020-10-30 07:05:27 +00:00
bucts.c	util/: Replace GPLv2 boiler plate with SPDX header	2020-05-09 21:22:08 +00:00
description.md
Makefile
readme.md

readme.md

What is bucts?

Many Intel southbridges provide a mechanism called Back Up Control Top Swap (BUC.TS). This functionality allows to have the southbridge fetch the reset vector or the beginning of the bootblock at a 64K/128/256K offset from the usual top of flash.

This can be useful in different ways:

Have a backup bootblock in case of bootblock hacking;
Some vendor BIOS only write protect their bootblock so this tool makes it possible to circumvent this protection to allow flashing and booting coreboot.

The BUC.TS status is stored in a nvram bit. To clear it one has to remove the RTC battery.

Operation Description

First compile bucts by running make:

$ make

Then you can view the current system settings:

$ ./bucts --print

To flip the decode address of the bootblock, by setting BUC.TS to 1:

$ ./bucts --set

To set the behavior the regular mapping, by setting BUC.TS to 0

$ ./bucts --unset

Details

Example Bootblock size of 64KB (this is only configurable to be something else like 128 or 256K on PCH Intel targets).

    +-------------+ -> 0x200000         +-------------+ -> 0xFFFFFFFF       +-------------+ -> 0xFFFFFFFF
    |             |                     |             |                     |             |
    | bootblock_0 |                     | bootblock_0 |                     | bootblock_1 |
    |             |                     |             |                     |             |
    +-------------+ -> 0x1F0000         +-------------+ -> 0xFFFF0000       +-------------+ -> 0xFFFF0000
    |             |                     |             |                     |             |
    | bootblock_1 |                     | bootblock_1 |                     | bootblock_0 |
    |             |                     |             |                     |             |
    +-------------+ -> 0x1E0000         +-------------+ -> 0xFFFE0000       +-------------+ -> 0xFFFE0000
    |             |                     |             |                     |             |
    |             |                     |             |                     |             |
    Z             Z                     Z             Z                     Z             Z
    Z             Z                     Z             Z                     Z             Z
    |             |                     |             |                     |             |
    |             |                     |             |                     |             |
    FLASH (2M)                          Memory Map BUC.TS=0               Memory Map BUC.TS=1