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coreboot/src/soc
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Marshall Dawson 5fdd201c17 amd/stoneyridge: Comment PCI and AcpiMmio registers in ASL 
TEST=Build Grunt
BUG=b:77602074

Change-Id: I24a46cc3e766ba7e9199723b042476064a698bf2
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/28865
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-05 01:37:29 +00:00
..
amd amd/stoneyridge: Comment PCI and AcpiMmio registers in ASL 2018-10-05 01:37:29 +00:00
broadcom soc/broadcom/cygnus: Increase romstage SRAM size in memlayout 2018-08-13 12:16:32 +00:00
cavium soc/cavium/cn81xx/spi: Add function to return SPI clock 2018-09-30 03:04:53 +00:00
imgtec soc/imgtec/pistachio: Get rid of device_t 2018-06-04 09:18:19 +00:00
intel soc/intel/cannonlake: Move the FSP related callbacks to separate files 2018-10-04 09:47:10 +00:00
lowrisc/lowrisc mb/lowrisc: Remove the Nexys4DDR port 2018-09-26 15:36:40 +00:00
mediatek mediatek: Refactor memory test code among similar SoCs 2018-09-06 10:29:39 +00:00
nvidia soc/nvidia/tegra124: Increase bootblock size 2018-10-04 09:45:47 +00:00
qualcomm drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
rockchip drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
samsung src: Fix typo 2018-08-10 21:25:53 +00:00
sifive soc/sifive/fu540: Document #if ENV_ROMSTAGE line 2018-09-26 18:52:54 +00:00
ucb arch/riscv: provide a monotonic timer 2018-09-14 09:28:06 +00:00