coreboot/src/vendorcode
Jonathan Zhang 9e0dd96e7e vc/intel/FSP2_0/CPX-SP: update to ww45 release and add watermark option
Intel CPX-SP FSP ww45 release annotates default values for FSP-M UPD
variables.

FSPM MemRefreshWatermark option support is present in FB's CPX-SP
FSP binary, but not in Intel's CPX-SP FSP binary. In FB's CPX-SP
FSP binary, this option takes the space of UnusedUpdSpace0[0].

For DeltaLake mainboard, if corresponding VPD variable is set, use it
to control the behavior. Such control is effective when FB's CPX-SP
FSP binary is used.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I57ad01f33b92bf61a6a2725dd1cdbbc99c02405d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46640
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
2020-11-07 00:12:35 +00:00
..
amd soc/amd/picasso: Update coreboot UPD variable names to include units 2020-11-06 13:02:24 +00:00
cavium {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent 2020-09-01 03:06:04 +00:00
eltan Kconfig: Escape variable to accommodate new Kconfig versions 2020-06-19 15:29:04 +00:00
google volteer+vendorcode: Retrieve Cr50 version only via SPI 2020-10-19 07:03:37 +00:00
intel vc/intel/FSP2_0/CPX-SP: update to ww45 release and add watermark option 2020-11-07 00:12:35 +00:00
siemens src: Fix up ##-commented SPDX headers 2020-06-01 17:01:13 +00:00
Makefile.inc vendorcode/eltan: Add vendor code for measured and verified boot 2019-06-04 10:41:53 +00:00