Tim Wawrzynczak 5faee2ed0f soc/intel/alderlake: Switch to runtime generation of Intel Power Engine ... The pep.asl file is being obsoleted by runtime generation, therefore switch alderlake boards to this method. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I617bc3d1c3cf4ac6b6cbbd790dcf62e731024834 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56006 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2021-09-10 21:53:32 +00:00
..
amd	Revert "soc/amd/common: Skip psp_verstage on S0i3 resume"	2021-09-09 20:41:31 +00:00
cavium
example	src: Introduce ARCH_ALL_STAGES_X86	2021-07-02 08:19:10 +00:00
intel	soc/intel/alderlake: Switch to runtime generation of Intel Power Engine	2021-09-10 21:53:32 +00:00
mediatek	mb/google/cherry: Fix incorrect timestamps in eventlog	2021-09-08 10:16:53 +00:00
nvidia	soc/nvidia/tegra124: Increase bootblock size	2021-07-26 05:05:41 +00:00
qualcomm	sc7280: Refactor QSPI driver	2021-09-03 18:01:57 +00:00
rockchip	include/bcd: move bcd code to commonlib/bsd/include	2021-08-23 14:08:47 +00:00
samsung	commonlib/region: Turn addrspace_32bit into a more official API	2021-04-21 02:06:26 +00:00
sifive
ti	soc/ti/am335x/mmc.c: Fix memset length argument	2021-04-04 09:58:26 +00:00
ucb