coreboot/src/soc/intel
Duncan Laurie 5f98e94a4c UPSTREAM: soc/intel/apollolake: Add function to translate device into ACPI name
Add support for the soc_acpi_name() handler in the device operations
structure to translate a device path into ACPI name.

In order to make this more complete add some missing devices in
include/soc/pci_devs.h.

BUG=None
BRANCH=None
TEST=None

Change-Id: I517bc86d8d9fe70bfa0fc4eb3828681887239587
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/15479
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/358581
Reviewed-by: Martin Roth <martinroth@chromium.org>
2016-07-07 01:08:58 -07:00
..
apollolake UPSTREAM: soc/intel/apollolake: Add function to translate device into ACPI name 2016-07-07 01:08:58 -07:00
baytrail UPSTREAM: intel romstage: Use run_ramstage() 2016-06-30 10:08:18 -07:00
braswell soc/intel: indicate to build system that XIP_ROM_SIZE isn't used 2016-05-06 16:50:00 +02:00
broadwell UPSTREAM: intel romstage: Use run_ramstage() 2016-06-30 10:08:18 -07:00
common UPSTREAM: skylake: Generate ACPI timing values for I2C devices 2016-07-07 01:08:46 -07:00
fsp_baytrail UPSTREAM: intel romstage: Use run_ramstage() 2016-06-30 10:08:18 -07:00
fsp_broadwell_de UPSTREAM: fsp_broadwell_de: Enable Super I/O address range decode 2016-07-01 11:02:47 -07:00
quark UPSTREAM: soc/intel/quark: Add C bootblock 2016-06-13 15:56:07 -07:00
sch UPSTREAM: intel/sch: Merge northbridge and southbridge in src/soc 2016-05-20 17:08:20 -07:00
skylake UPSTREAM: skylake: Generate ACPI timing values for I2C devices 2016-07-07 01:08:46 -07:00