coreboot/src
Felix Singer 5e0fc511fd soc/intel/apollolake/acpi: Replace LAnd() with ASL 2.0 syntax
Replace `LAnd (a, b)` with `a && b`.

Change-Id: I4bbbc4888fc134b3862bb956b2ee17a72f282584
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60466
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-12-30 16:24:33 +00:00
..
acpi ChromeOS: Refactor ACPI CNVS generation 2021-12-23 21:18:25 +00:00
arch arch/x86: Init firmware pointer for EC SMSC KBC1098/KBC1126 at build time 2021-12-21 18:13:45 +00:00
commonlib commonlib: Add new TS for CSE firmware Sync 2021-12-20 17:51:27 +00:00
console
cpu cpu/x86/mp_init.c: Make it work for !CONFIG_SMP 2021-12-10 15:57:34 +00:00
device device: Make pciexp_get_ltr_max_latencies a public function 2021-12-22 18:14:47 +00:00
drivers drivers/intel/gma/acpi: Use ASL 2.0 syntax to access arrays 2021-12-30 14:26:18 +00:00
ec ec/google/chromeec/acpi: Replace LAnd() with ASL 2.0 syntax 2021-12-30 16:24:14 +00:00
include include/types.h: #include <limits.h> 2021-12-26 09:59:12 +00:00
lib ChromeOS: Refactor ACPI CNVS generation 2021-12-23 21:18:25 +00:00
mainboard mb/google/cyan/acpi: Use ASL 2.0 syntax to access arrays 2021-12-30 14:31:23 +00:00
northbridge northbridge/intel/ironlake/acpi: Use Printf() for debug prints 2021-12-30 14:24:26 +00:00
security Revert "security/vboot: Add NVRAM counter for TPM 2.0" 2021-12-16 20:58:30 +00:00
soc soc/intel/apollolake/acpi: Replace LAnd() with ASL 2.0 syntax 2021-12-30 16:24:33 +00:00
southbridge southbridge/intel/bd82x6x/acpi: Use Printf() for debug prints 2021-12-30 14:24:46 +00:00
superio superio/smsc/sch5545: Disable PS/2 lines isolation during init 2021-11-27 14:23:08 +00:00
vendorcode Revert "Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02"" 2021-12-26 10:02:55 +00:00
Kconfig Kconfig: Show console DEBUG_FUNC if OVERRIDE_LOGLEVEL is set 2021-11-13 00:20:11 +00:00