5e04c6e580
Instead of performing the same tasks in the chipset code move the common sequences into the FSP 2.0 driver. This handles the S3 paths as well as saving and restoring the memory data. The chipset code can always override the settings if needed. BUG=chrome-os-partner:52679 BRANCH=None TEST=None Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15739 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Change-Id: I098bf95139a0360f028a50aa50d16d264bede386 Reviewed-on: https://chromium-review.googlesource.com/361772 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| fsp1_0 | ||
| fsp1_1 | ||
| fsp2_0 | ||
| gma | ||
| i210 | ||
| wifi | ||