coreboot/src/soc
Martin Roth 5c8e7a4075 fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macro
- Update chipset_fsp_util.h to add the UPD_MEMDOWN_CHECK pointing into
the PcdMemoryParameters structure.  This is baytrail FSP specific, so
it's put into the chipset code instead of the 'driver' code.  Since some
of the values need to be decremented and some do not, a second parameter
was added to control this.  This macro also does not print out the
values as they are printed out separately if memory down is enabled.
- Update chipset_fsp_util.c to use the UPD_MEMDOWN_CHECK macro.  This
makes the code more standardized and easier to read.

Change-Id: I233e45db43af4726cab41f4880f1706cf8abb0b7
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7632
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-12-05 16:21:48 +01:00
..
intel fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macro 2014-12-05 16:21:48 +01:00
nvidia Replace hlt with halt() 2014-12-02 10:25:55 +01:00
qualcomm ipq8064: Make timer code compile 2014-11-13 06:29:16 +01:00
samsung Replace hlt with halt() 2014-12-02 10:25:55 +01:00
ucb Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00
Kconfig Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00
Makefile.inc Add UCB RISCV support for architecture, soc, and emulation mainboard.. 2014-12-01 19:06:43 +01:00