coreboot/src/cpu
Arne Georg Gleditsch 01d56d4276 Clear bit 35 of msr c001_102a in Fam10 rev C cores.
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Scott Duplichan <scott@notabs.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5817 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-09-17 00:13:52 +00:00
..
amd Clear bit 35 of msr c001_102a in Fam10 rev C cores. 2010-09-17 00:13:52 +00:00
intel We call this cache as ram everywhere, so let's call it the same in Kconfig 2010-08-30 17:53:13 +00:00
via It should not be necessary to read in the rom during CAR setup. 2010-09-08 10:53:44 +00:00
x86 Adapt comment, too. (trivial) 2010-09-09 22:12:40 +00:00
Kconfig We call this cache as ram everywhere, so let's call it the same in Kconfig 2010-08-30 17:53:13 +00:00
Makefile.inc qemu: drop "northbridge.c" from src/cpu/... 2010-03-29 21:17:25 +00:00