coreboot/src/include/cpu/intel
Kyösti Mälkki 5bc641afeb cpu/intel: Refactor platform_enter_postcar()
There are benefits in placing the postcar_frame structure
in .bss and returning control to romstage_main().

Change-Id: I0418a2abc74f749203c587b2763c5f8a5960e4f9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34808
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-08-15 05:31:29 +00:00
..
em64t100_save_state.h cpu/x86: Separate save_state struct headers 2019-08-13 13:59:05 +00:00
em64t101_save_state.h cpu/x86: Separate save_state struct headers 2019-08-13 13:59:05 +00:00
em64t_save_state.h cpu/x86: Separate save_state struct headers 2019-08-13 13:59:05 +00:00
fsb.h src/cpu/intel: Set get_ia32_fsb function common 2019-01-27 12:13:09 +00:00
hyperthreading.h Intel CPUs: execute microcode update only once per core 2012-07-02 15:49:07 +02:00
l2_cache.h src: Move common IA-32 MSRs to <cpu/x86/msr.h> 2018-10-11 21:06:53 +00:00
microcode.h Fix typos involving "the the" 2018-12-18 13:24:28 +00:00
romstage.h cpu/intel: Refactor platform_enter_postcar() 2019-08-15 05:31:29 +00:00
speedstep.h src: Move common IA-32 MSRs to <cpu/x86/msr.h> 2018-10-11 21:06:53 +00:00
turbo.h src: Move common IA-32 MSRs to <cpu/x86/msr.h> 2018-10-11 21:06:53 +00:00