Elyes HAOUAS 5a5ed1fb20 soc/intel: Remove unused <string.h> ... Found using following command: diff <(git grep -l '#include <string.h>' -- src/) <(git grep -l 'STRINGIFY\|memcpy(\|memmove(\|memset(\|memcmp(\|memchr(\|strdup(\|strconcat(\|strnlen(\|strlen(\|strchr(\|strncpy(\|strcpy(\|strcmp(\|strncmp(\|strspn(\|strcspn(\|strstr(\|strtok_r(\|strtok(\|atol(\|strrchr(\|skip_atoi(\|vsnprintf(\|snprintf(' -- src/) Change-Id: Iae90ff482f534d8de2a519619c20a019d054e700 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2022-01-05 17:37:49 +00:00
..
acpi
bootblock
include/soc	soc/intel/icelake: correct wrong gpio SMI register base offsets	2021-09-23 06:31:58 +00:00
romstage
acpi.c	soc/intel: Remove unused <string.h>	2022-01-05 17:37:49 +00:00
chip.c
chip.h	soc/intel: replace dt option PmTimerDisabled by Kconfig	2021-10-12 18:25:35 +00:00
cpu.c	cpu/x86/mp_init: move printing of failure message into mp_init_with_smm	2021-10-22 01:27:07 +00:00
elog.c
espi.c
finalize.c	soc/intel: move disabling of PM Timer to SoC PMC code	2021-10-17 13:57:30 +00:00
fsp_params.c	soc/intel: transition full control over PM Timer from FSP to coreboot	2021-10-17 13:59:04 +00:00
gpio.c	soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers	2021-09-23 06:31:48 +00:00
gspi.c
i2c.c
Kconfig	soc/intel/common/thermal: Refactor thermal block to improve reusability	2021-11-25 07:18:04 +00:00
lockdown.c
Makefile.inc	cpu/x86: Introduce and use CPU_X86_LAPIC	2021-10-26 17:44:14 +00:00
me.c
p2sb.c
pmc.c	soc/intel: implement ACPI timer disabling per SoC and drop common code	2021-10-17 13:57:53 +00:00
pmutil.c	soc/intel/icelake: Clear RTC_BATTERY_DEAD	2021-09-20 15:44:12 +00:00
reset.c
sd.c
smihandler.c
spi.c
systemagent.c	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
uart.c