Arthur Heymans 59b6542bbc soc/intel/braswell: Use common cpu/intel/car code ... The code in cpu/intel/car/romstage.c Does most of the things like setting up timestamps, stack guards, entering postcar. A functional difference is that the FSP header is searched for twice instead of passed from the CAR entry to the C code. When using C_ENVIRONMENT_BOOTBLOCK this needs to be done anyway (or a special linker symbol kept across multiple stages is needed, which is likely not worth the speedup). Change-Id: I0f03e5a808f00157fdd807b104417a54e4bde7b2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32963 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>		2019-06-04 11:25:32 +00:00
..
apollolake	soc/intel: Replace UART_BASE() and friends with a Kconfig	2019-06-03 15:23:49 +00:00
baytrail	soc/intel/baytrail: set default VBIOS filename and PCI ID	2019-06-02 22:26:34 +00:00
braswell	soc/intel/braswell: Use common cpu/intel/car code	2019-06-04 11:25:32 +00:00
broadwell	src/soc/intel: Avoid NULL pointer dereference	2019-06-03 18:24:06 +00:00
cannonlake	soc/intel/cannonlake: Do not read SPD again if index hasn't changed	2019-06-04 02:40:08 +00:00
common	soc/intel: Replace UART_BASE() and friends with a Kconfig	2019-06-03 15:23:49 +00:00
denverton_ns	soc/intel/denverton_ns: Don't use CONFIG_CBFS_SIZE	2019-05-29 20:24:13 +00:00
fsp_baytrail	soc/intel/fsp_baytrail/romstage: Remove variable set but not used	2019-05-23 08:58:33 +00:00
fsp_broadwell_de	soc/intel/fsp_broadwell_de/romstage: Remove variable set but not used	2019-05-23 08:58:15 +00:00
icelake	soc/intel: Replace UART_BASE() and friends with a Kconfig	2019-06-03 15:23:49 +00:00
quark	soc/intel/quark: Don't use CAR_GLOBAL	2019-05-29 20:05:06 +00:00
skylake	soc/intel: Replace UART_BASE() and friends with a Kconfig	2019-06-03 15:23:49 +00:00
Kconfig	src/cpu: Remove dead sourced lines	2018-11-15 10:25:20 +00:00