coreboot/src/southbridge
Angel Pons 59ac2cb2c0 sb/intel/wildcatpoint/pcie.c: Drop redundant write
This write is already done later on, in `pcie_enable_clock_gating()`.

Change-Id: Id152e1358f581e2a3ef6871a909be366f309c1dd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91472
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-06 20:06:53 +00:00
..
amd treewide: Assume FMAP_SECTION_FLASH_START = 0 2025-04-18 14:57:05 +00:00
intel sb/intel/wildcatpoint/pcie.c: Drop redundant write 2026-03-06 20:06:53 +00:00
ricoh/rl5c476 tree: Remove blank lines before '}' and after '{' 2024-04-11 19:19:08 +00:00
ti tree: Remove blank lines before '}' and after '{' 2024-04-11 19:19:08 +00:00