Subrata Banik 588c2c42c3 soc/intel/cannonlake: Rectify LPC Lock Enable (LE) bit definition ... LPC pci config register BIOS Control (BC) - offset 0xDC bit 1 is for Lock Down. Change-Id: I4780d2e41c833c0146640f715759dbb0a948c4ab Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/21001 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-08-15 23:12:22 +00:00
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amd	stoneyridge: Fix CPU ASL \_PR table	2017-08-14 19:36:50 +00:00
broadcom/cygnus	i2c: Move to Linux like struct i2c_msg	2017-08-14 18:07:30 +00:00
dmp/vortex86ex	soc/dmp/vortex86: Fix CMOS read and random RTC reset	2017-08-01 13:20:15 +00:00
imgtec/pistachio	Consolidate reset API, add generic reset_prepare mechanism	2017-06-13 20:53:09 +02:00
intel	soc/intel/cannonlake: Rectify LPC Lock Enable (LE) bit definition	2017-08-15 23:12:22 +00:00
lowrisc/lowrisc	soc/lowrisc: Place CBMEM at top of autodetected RAM	2016-12-06 18:51:13 +01:00
marvell/mvmap2315	Update files with no newline at the end	2017-07-24 15:08:16 +00:00
mediatek/mt8173	i2c: Move to Linux like struct i2c_msg	2017-08-14 18:07:30 +00:00
nvidia	i2c: Move to Linux like struct i2c_msg	2017-08-14 18:07:30 +00:00
qualcomm	i2c: Move to Linux like struct i2c_msg	2017-08-14 18:07:30 +00:00
rockchip	i2c: Move to Linux like struct i2c_msg	2017-08-14 18:07:30 +00:00
samsung	i2c: Move to Linux like struct i2c_msg	2017-08-14 18:07:30 +00:00
ucb/riscv	soc/ucb/riscv: Place CBMEM at top of autodetected RAM	2016-12-06 18:48:28 +01:00