Kangheui Won 5858fb4e35 psp_verstage: differentiate bios entry ... AMDFW tool stores bios dir entry to bios1_entry in picasso but bios3_entry in cezanne. Separate getting bios_dir_addr into a function and implement it on each platforms. Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Ie18ed7979a04319c074b9b251130d419dc7f22dc Reviewed-on: https://review.coreboot.org/c/coreboot/+/52964 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-05-10 04:07:09 +00:00
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amd	psp_verstage: differentiate bios entry	2021-05-10 04:07:09 +00:00
cavium
example
intel	soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXIT	2021-05-07 06:05:37 +00:00
mediatek	soc/mediatek/mt8195: Add RTC driver	2021-05-10 01:58:28 +00:00
nvidia	cbfs: Replace more instances of cbfs_boot_locate() with newer APIs	2021-03-17 08:10:20 +00:00
qualcomm	Coachz: Observe SPI_CLK voltage level is only 1.4V, need to adjust	2021-04-24 00:24:00 +00:00
rockchip	soc/rockchip/rk3399/sdram: Add channel to error message	2021-03-04 01:22:10 +00:00
samsung	commonlib/region: Turn addrspace_32bit into a more official API	2021-04-21 02:06:26 +00:00
sifive	memlayout: Store region sizes as separate symbols	2021-02-19 08:39:26 +00:00
ti	soc/ti/am335x/mmc.c: Fix memset length argument	2021-04-04 09:58:26 +00:00
ucb