David Hendricks d87d639e26 replace uchar and uint with standard types in generic i2c header ... Change-Id: Ie72985bb5291bcef2e837a2f4f2ec929a0c086ce Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2290 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2013-02-06 02:11:38 +01:00
..
agp.h
cardbus.h
device.h	Add initialization hook for chips	2012-11-27 09:16:03 +01:00
hypertransport.h
hypertransport_def.h
i2c.h	replace uchar and uint with standard types in generic i2c header	2013-02-06 02:11:38 +01:00
path.h	AMD northbridges: factor out CPU allocation	2012-08-27 15:36:47 +02:00
pci.h	Make the device tree available in the rom stage	2012-08-04 18:05:39 +02:00
pci_def.h	Add support for enabling PCIe Common Clock and ASPM	2012-03-29 22:16:07 +02:00
pci_ids.h	Add support for HM70 and NM70 LPC bridge	2012-07-24 12:26:26 +02:00
pci_ops.h	PCI Type2 config must die	2012-07-05 23:01:42 +02:00
pci_rom.h	Add OPROM mapping support to coreboot	2012-02-07 00:09:58 +01:00
pciexp.h	Add support for enabling PCIe Common Clock and ASPM	2012-03-29 22:16:07 +02:00
pcix.h	Cosmetics and coding style fixes in devices/*.	2010-10-18 00:00:57 +00:00
pnp.h	W83627DHG/W83627EHG fixups for virtual LDNs.	2010-12-05 22:36:14 +00:00
pnp_def.h
resource.h	Drop unused ISA Pnp definitions	2012-08-27 23:20:30 +02:00
smbus.h	Cosmetics and coding style fixes in devices/*.	2010-10-18 00:00:57 +00:00
smbus_def.h