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coreboot/src/soc
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Kane Chen 57e42c781d broadwell: pcie updates from 2.1.0 ref code 
some clock gating and pcie settings are missed in original code

BUG=chrome-os-partner:28234
BRANCH=None
TEST=build and boot on samus
     verify registers between samus and crb

Change-Id: I931276adb2f2667c4f9e7611acfd709b7232d492
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/214568
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2014-08-28 04:23:54 +00:00
..
intel broadwell: pcie updates from 2.1.0 ref code 2014-08-28 04:23:54 +00:00
nvidia t132: Increase TrustZone Carveout Region size 2014-08-28 01:14:39 +00:00
qualcomm ipq806x: implement GPIO API 2014-07-30 23:40:58 +00:00
rockchip coreboot: rk3288: add clock module 2014-08-13 02:50:48 +00:00
samsung coreboot classes: Add dynamic classes to coreboot 2014-07-28 19:19:34 +00:00
Kconfig coreboot: rk3288: Add a stub implementation of the rk3288 SOC 2014-07-23 06:46:35 +00:00
Makefile.inc coreboot: rk3288: Add a stub implementation of the rk3288 SOC 2014-07-23 06:46:35 +00:00