coreboot/src/soc
Nico Huber 3c0d23b6ab intel/fsp1_1: Drop remnants of pei_data
`pei_data` was a struct with blob parameters from pre-FSP times.
Somehow, it sneaked into upstream FSP1.1 support (probably because
early board ports were written for a different blob). When added
upstream, its usage was already perverted. It was declared at SoC
level but mostly used to pass mainboard data from mainboard code
to itself and FSP data from FSP code to itself. Now that no board/
SoC code uses it anymore, we can finally drop it.

Change-Id: Ib0bc402703188539cf2254bdc395cca9dd32d863
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-07 15:59:10 +00:00
..
amd soc/amd/stoneyridge: Correct bugs in lpc.c 2019-05-06 10:33:03 +00:00
cavium soc/cavium/common/bootblock: Remove unused variables 2019-04-25 15:55:27 +00:00
imgtec arch/mips: Fix <arch/mmio.h> prototypes 2019-03-22 12:18:41 +00:00
intel intel/fsp1_1: Drop remnants of pei_data 2019-05-07 15:59:10 +00:00
mediatek mediatek/mt8183: Wait 200us for voltages to settle 2019-05-06 10:27:53 +00:00
nvidia vboot: refactor OPROM code 2019-04-30 21:47:25 +00:00
qualcomm Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
rockchip Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
samsung Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
sifive src/mb/sifive/hifive-unleashed: initialize Gigabit Ethernet Controller 2019-03-18 09:12:46 +00:00
ucb riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00