Felix Held 54888d0846 soc/amd/stoneyridge/psp: move soc_get_mbox_address to common psp_gen1 ... Despite Stoneyridge being one only SoC in soc/amd that uses the first generation of the PSP mailblox interface, this code is common for all SoCs that use the first PSP mailbox interface generation, so move it to the common PSP generation 1 code. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I78126cb710a6ee674b58b35c8294685a5965ecd6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59701 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-11-30 21:56:00 +00:00
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cezanne	soc/amd/cezanne: add missing PM_ACPI_* bit definitions	2021-11-30 14:40:09 +00:00
common	soc/amd/stoneyridge/psp: move soc_get_mbox_address to common psp_gen1	2021-11-30 21:56:00 +00:00
picasso	cpu/x86: Rename X86_AMD_INIT_SIPI to X86_INIT_NEED_1_SIPI	2021-11-29 09:45:14 +00:00
stoneyridge	soc/amd/stoneyridge/psp: move soc_get_mbox_address to common psp_gen1	2021-11-30 21:56:00 +00:00
Kconfig