Kyösti Mälkki 5458b9d90a Intel cpus: Extend cache to cover complete Flash Device ... CACHE_ROM_SIZE default is ROM_SIZE, the Flash device size set in menuconfig. This fixes a case where 8 MB SPI flash MTRR setup would not cover the bottom 4 MB when ramstage is decompressed. Verify CACHE_ROM_SIZE is power of two. One may set CACHE_ROM_SIZE==0 to disable this cache. Change-Id: Ib2b4ea528a092b96ff954894e60406d64f250783 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1146 Tested-by: build bot (Jenkins) Reviewed-by: Sven Schnelle <svens@stackframe.org>		2012-07-04 14:47:53 +02:00
..
amd	AGESA F15 wrapper for Trinity	2012-07-03 09:38:55 +02:00
intel	Intel cpus: Extend cache to cover complete Flash Device	2012-07-04 14:47:53 +02:00
via	Replace cache control magic numbers with symbols	2012-04-25 16:27:07 +02:00
x86	remove CONFIG_SERIAL_CPU_INIT	2012-07-02 21:44:36 +02:00
Kconfig	Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boards	2012-05-01 21:20:21 +02:00
Makefile.inc	qemu: drop "northbridge.c" from src/cpu/...	2010-03-29 21:17:25 +00:00