coreboot/src/soc
James Lo 543b32f60d soc/mediatek/mt8195: fine tune pmif spi hardware settings for stability
Update IO driving setting for pmif spi.

Signed-off-by: James Lo <james.lo@mediatek.corp-partner.google.com>
Change-Id: I48268cda8845a591592d8ca828ffe492e6dfe0ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56166
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-07-12 02:54:36 +00:00
..
amd soc/amd/picasso: Allow end range entry for max device ID in IVRS 2021-07-06 22:10:10 +00:00
cavium
example src: Introduce ARCH_ALL_STAGES_X86 2021-07-02 08:19:10 +00:00
intel soc/intel/alderlake: Avoid NULL pointer deference 2021-07-08 15:47:53 +00:00
mediatek soc/mediatek/mt8195: fine tune pmif spi hardware settings for stability 2021-07-12 02:54:36 +00:00
nvidia cbfs: Replace more instances of cbfs_boot_locate() with newer APIs 2021-03-17 08:10:20 +00:00
qualcomm sc7280: Add target specific GPIO pin definitions 2021-06-11 07:36:16 +00:00
rockchip
samsung commonlib/region: Turn addrspace_32bit into a more official API 2021-04-21 02:06:26 +00:00
sifive
ti soc/ti/am335x/mmc.c: Fix memset length argument 2021-04-04 09:58:26 +00:00
ucb