539fd2ac5a
There are two APL specific config switches for RAPL and min. cpu clock
(APL_SKIP_SET_POWER_LIMITS, APL_SET_MIN_CLOCK_RATIO). These switches
could be used in future in other CPU platforms. Move them to common code
instead of having them just for one SOC.
Test: Make sure that the clock ratio (MSR 0x198) and the RAPL settings
(MSR0x610) do not change with this patch applied on mc_apl{1,4,5}
mainboard.
Change-Id: I3d63d1b9b6c96586a3c20bf8c1d8001b1d7c4bed
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63546
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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|---|---|---|
| .. | ||
| acpi | ||
| basecode | ||
| block | ||
| pch | ||
| fsp_reset.c | ||
| hda_verb.c | ||
| hda_verb.h | ||
| Kconfig.common | ||
| Makefile.inc | ||
| mma.c | ||
| mma.h | ||
| nhlt.c | ||
| reset.c | ||
| reset.h | ||
| smbios.c | ||
| smbios.h | ||
| tpm_tis.c | ||
| vbt.c | ||
| vbt.h | ||