coreboot/src/soc
Zhanyong Wang 06639f2abf soc/mediatek/mt8192: Refactor USB code among similar SoCs
Adjust ssusb register layout and offset accroding mt8192 Soc
then refactor USB code which will be reused among similar SoCs

Signed-off-by: Tianping Fang <tianping.fang@mediatek.com>
Signed-off-by: Zhanyong Wang <zhanyong.wang@mediatek.com>
Change-Id: Icb4cc304654b5fb7cf20b96ab83a22663bfeab63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45396
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2020-10-12 08:55:53 +00:00
..
amd soc/amd/picasso: Remove xhci0_force_gen1 from soc config 2020-10-08 01:30:36 +00:00
cavium soc/cavium: Drop unneeded empty lines 2020-09-22 17:14:49 +00:00
intel soc/intel/jasperlake: Allow mainboard to override chip configuration 2020-10-12 08:53:18 +00:00
mediatek soc/mediatek/mt8192: Refactor USB code among similar SoCs 2020-10-12 08:55:53 +00:00
nvidia soc/nvidia: Drop unneeded empty lines 2020-09-22 17:14:59 +00:00
qualcomm trogdor: Modify DDR training to use mrc_cache 2020-10-09 19:45:40 +00:00
rockchip soc/rockchip: Drop unneeded empty lines 2020-09-21 16:18:49 +00:00
samsung soc/samsung: Drop unneeded empty lines 2020-09-21 16:18:07 +00:00
sifive include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
ti include/console/uart: make index parameter unsigned 2020-09-12 14:59:33 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00