coreboot/src/drivers/intel
praveen hodagatta pranesh 6c96542a3e drivers/intel/fsp2_0: Add new config option to support FSP CAR
CPU_MICROCODE_CBFS_LEN and CPU_MICROCODE_CBFS_LOC configs pass the CPU
microcode length and base address in CBFS to FSPT binary as init parameters.

Add new config FSP_T_XIP in Kconfig, which is selected by platform config.
If FSP_T_XIP is selected, then relocate FSPT binary while adding it in CBFS
so that it can be executed in place.

BUG= None
TEST= Build for both CFL RVP11 & RVP8 and verified for successfull CAR setup.

Change-Id: Ic46e0bb9ee13c38ff322979119c4813653c61029
Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>
Reviewed-on: https://review.coreboot.org/28985
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-10-17 06:06:49 +00:00
..
fsp1_0 Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
fsp1_1 Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
fsp2_0 drivers/intel/fsp2_0: Add new config option to support FSP CAR 2018-10-17 06:06:49 +00:00
gma Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
i210 src/{device,drivers}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:27:34 +00:00
mipi_camera Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
wifi Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00