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coreboot/src/southbridge
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Nico Huber 2ac149d294 sb/intel/bd82x6x: Revise flash ROM lockdown options 
The original options were named and described under the false assumption
that the chipset lockdown would only be executed during S3 resume. Fix
that.

Change-Id: I435a3b63dd294aa766b1eccf1aa80a7c47e55c95
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/21327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-09-22 19:17:49 +00:00
..
amd vboot: remove init_vbnv_cmos() 2017-09-20 23:53:23 +00:00
broadcom Consolidate reset API, add generic reset_prepare mechanism 2017-06-13 20:53:09 +02:00
intel sb/intel/bd82x6x: Revise flash ROM lockdown options 2017-09-22 19:17:49 +00:00
nvidia usbdebug: Refactor early enable 2017-08-07 12:35:42 +00:00
ricoh/rl5c476 Rename __attribute__((packed)) --> __packed 2017-07-13 19:45:59 +00:00
sis/sis966 usbdebug: Refactor early enable 2017-08-07 12:35:42 +00:00
ti
via southbridge/via/vt8237r/acpi: Add IRQ routing 2017-08-28 15:24:49 +00:00